VIKAS NAGARAJ. Challenges in Verifying Test Pattern Generators for Modern Semiconductor Designs. Frontiers in Emerging Engineering & Technologies, [S. l.], v. 1, n. 01, p. 49–73, 2024. Disponível em: https://irjernet.com/index.php/feet/article/view/176. Acesso em: 26 oct. 2025.